[TLP Test System] Pulse Curve Tracer Model4002 / Model 4012

Barth 4002 TLP Pulsed Curve Tracer

The Barth 4002 TLP Pulsed Curve Tracer precisely characterizes the ESD robustness of silicon chip protection circuitry. Programmed rectangular pulses are applied to the device under test, resulting in a computerized plot of current vs voltage. A leakage measurement is made after each pulse to obtain the evolution vs pulsed current. Set up for packaged device testing, an optional dual wafer probe (Barth Model 45001WP), permits wafer level testing as well.

Barth 45001WP Wafer Probe (Option)

The Barth 45001WP Wafer Probe is designed for pulse testing of the ESD protection I/V characteristics at the wafer level. It has two separate needles and isolated probe connections that can be independently positioned with no interaction between them. It has been specially designed to provide the same accuracy as when testing packaged device in a socket. To minimize the mechanical problems of crossed needles in connecting to the pads to be tested, a specially designed constant impedance-reversing switch allows easy selection of the TLP pulse polarity at the pads. A strong magnetic or vacuum base allows this TLP probe to be easily moved while maintaining a secure position on the table.

Features/Functions

Model 4002

• Pulse width selection : 75ns to 200ns
• Pulse voltage : 0 to 500V (to open load), 0 to 250V (to 50 ohm load)
• Pulse current : 0 to 5A (to 50 ohm load), 0 to 10A (to short load)
• Pulse Rise Time : 0.2ns, 2ns and 10ns (typical)
• Damage detection by leakage current measurement after each pulse
• Wafer level test (with optional Model 45001WP)
• 20A, 30A and 500ns width options available

Model 4012 VF-TLP

• Pulse width variable : 1ns (min)
• Pulse current : 16A (max)
• Pulse Rise Time : 100ps (min)
• Snap back measurement of an ultra high-speed response
• Ultra high-speed ESD protection circuit evaluations, such as cdm mode
• Microwave 50ohm probe available for wafer level test